How to use Register method of powerpc Package

Best Syzkaller code snippet using powerpc.Register

note.go

Source:note.go

...37	NT_PRXFPREG     NoteType = 0x46e62b7f /* copied from gdb5.1/include/elf/common.h */38	NT_PPC_VMX      NoteType = 0x100 /* PowerPC Altivec/VMX registers */39	NT_PPC_SPE      NoteType = 0x101 /* PowerPC SPE/EVR registers */40	NT_PPC_VSX      NoteType = 0x102 /* PowerPC VSX registers */41	NT_PPC_TAR      NoteType = 0x103 /* Target Address Register */42	NT_PPC_PPR      NoteType = 0x104 /* Program Priority Register */43	NT_PPC_DSCR     NoteType = 0x105 /* Data Stream Control Register */44	NT_PPC_EBB      NoteType = 0x106 /* Event Based Branch Registers */45	NT_PPC_PMU      NoteType = 0x107 /* Performance Monitor Registers */46	NT_PPC_TM_CGPR  NoteType = 0x108 /* TM checkpointed GPR Registers */47	NT_PPC_TM_CFPR  NoteType = 0x109 /* TM checkpointed FPR Registers */48	NT_PPC_TM_CVMX  NoteType = 0x10a /* TM checkpointed VMX Registers */49	NT_PPC_TM_CVSX  NoteType = 0x10b /* TM checkpointed VSX Registers */50	NT_PPC_TM_SPR   NoteType = 0x10c /* TM Special Purpose Registers */51	NT_PPC_TM_CTAR  NoteType = 0x10d /* TM checkpointed Target Address Register */52	NT_PPC_TM_CPPR  NoteType = 0x10e /* TM checkpointed Program Priority Register */53	NT_PPC_TM_CDSCR NoteType = 0x10f /* TM checkpointed Data Stream Control Register */54	NT_386_TLS      NoteType = 0x200 /* i386 TLS slots (struct user_desc) */55	NT_386_IOPERM   NoteType = 0x20156	NT_X86_XSTATE   NoteType = 0x20257	NT_S390_HIGH_GPRS       NoteType = 0x300 /* s390 upper register halves */58	NT_S390_TIMER   NoteType = 0x301 /* s390 timer register */59	NT_S390_TODCMP  NoteType = 0x302 /* s390 TOD clock comparator register */60	NT_S390_TODPREG NoteType = 0x303 /* s390 TOD programmable register */61	NT_S390_CTRS    NoteType = 0x304 /* s390 control registers */62	NT_S390_PREFIX  NoteType = 0x305 /* s390 prefix register */63	NT_S390_LAST_BREAK      NoteType = 0x306 /* s390 breaking event address */64	NT_S390_SYSTEM_CALL     NoteType = 0x307 /* s390 system call restart data */65	NT_S390_TDB     NoteType = 0x308 /* s390 transaction diagnostic block */66	NT_S390_VXRS_LOW        NoteType = 0x309 /* s390 vector registers 0-15 upper half */67	NT_S390_VXRS_HIGH       NoteType = 0x30a /* s390 vector registers 16-31 */68	NT_ARM_VFP      NoteType = 0x400 /* ARM VFP/NEON registers */69	NT_ARM_TLS      NoteType = 0x401 /* ARM TLS register */70	NT_ARM_HW_BREAK NoteType = 0x402 /* ARM hardware breakpoint registers */71	NT_ARM_HW_WATCH NoteType = 0x403 /* ARM hardware watchpoint registers */72	NT_ARM_SYSTEM_CALL      NoteType = 0x404 /* ARM system call number */73	NT_METAG_CBUF   NoteType = 0x500 /* Metag catch buffer registers */74	NT_METAG_RPIPE  NoteType = 0x501 /* Metag read pipeline state */75	NT_METAG_TLS    NoteType = 0x502 /* Metag TLS pointer */76)77var shnStrings = []intName{78	{0x1, "NT_PRSTATUS"},79	{0x2, "NT_PRFPREG"},80	{0x3, "NT_PRPSINFO"},81	{0x4, "NT_PRXREG"},82	{0x5, "NT_PLATFORM"},83	{0x6, "NT_AUXV"},84	{0x53494749, "NT_SIGINFO"},85	{0x46494c45, "NT_FILE"},86	{0x46e62b7f, "NT_PRXFPREG"}, /* copied from gdb5.1/include/elf/common.h */87	{0x100, "NT_PPC_VMX"}, /* PowerPC Altivec/VMX registers */88	{0x101, "NT_PPC_SPE"}, /* PowerPC SPE/EVR registers */89	{0x102, "NT_PPC_VSX"}, /* PowerPC VSX registers */90	{0x103, "NT_PPC_TAR"}, /* Target Address Register */91	{0x104, "NT_PPC_PPR"}, /* Program Priority Register */92	{0x105, "NT_PPC_DSCR"}, /* Data Stream Control Register */93	{0x106, "NT_PPC_EBB"}, /* Event Based Branch Registers */94	{0x107, "NT_PPC_PMU"}, /* Performance Monitor Registers */95	{0x108, "NT_PPC_TM_CGPR"}, /* TM checkpointed GPR Registers */96	{0x109, "NT_PPC_TM_CFPR"}, /* TM checkpointed FPR Registers */97	{0x10a, "NT_PPC_TM_CVMX"}, /* TM checkpointed VMX Registers */98	{0x10b, "NT_PPC_TM_CVSX"}, /* TM checkpointed VSX Registers */99	{0x10c, "NT_PPC_TM_SPR"}, /* TM Special Purpose Registers */100	{0x10d, "NT_PPC_TM_CTAR"}, /* TM checkpointed Target Address Register */101	{0x10e, "NT_PPC_TM_CPPR"}, /* TM checkpointed Program Priority Register */102	{0x10f, "NT_PPC_TM_CDSCR"}, /* TM checkpointed Data Stream Control Register */103	{0x200, "NT_386_TLS"}, /* i386 TLS slots (struct user_desc) */104	{0x201, "NT_386_IOPERM"},105	{0x202, "NT_X86_XSTATE"},106	{0x300, "NT_S390_HIGH_GPRS"}, /* s390 upper register halves */107	{0x301, "NT_S390_TIMER"}, /* s390 timer register */108	{0x302, "NT_S390_TODCMP"}, /* s390 TOD clock comparator register */109	{0x303, "NT_S390_TODPREG"}, /* s390 TOD programmable register */110	{0x304, "NT_S390_CTRS"}, /* s390 control registers */111	{0x305, "NT_S390_PREFIX"}, /* s390 prefix register */112	{0x306, "NT_S390_LAST_BREAK"}, /* s390 breaking event address */113	{0x307, "NT_S390_SYSTEM_CALL"}, /* s390 system call restart data */114	{0x308, "NT_S390_TDB"}, /* s390 transaction diagnostic block */115	{0x309, "NT_S390_VXRS_LOW"}, /* s390 vector registers 0-15 upper half */116	{0x30a, "NT_S390_VXRS_HIGH"}, /* s390 vector registers 16-31 */...

powerpc_encoding.go

Source:powerpc_encoding.go

1package powerpc2import (3	"encoding/binary"4)5// Register represents a value for a PowerPC register.6type Register byte7const (8	R0 = iota9	R110	R211	R312	R413	R514	R615	R716	R817	R918	R1019	R1120	R1221	R1322	R1423	R1524	R1625	R1726	R1827	R1928	R2029	R2130	R2231	R2332	R2433	R2534	R2635	R2736	R2837	R2938	R3039	R3140)41// SpecialRegister represents a value for a PowerPC register.42type SpecialRegister byte43const (44	// XER represents the integer exception register.45	XER SpecialRegister = 146	// LR represents the link register.47	LR SpecialRegister = 848	// CTR represents the count register.49	CTR SpecialRegister = 950)51// Bits represents bits for a byte.52// If set, considered as 1. If not, 0.53type Bits [8]bool54// getBits returns a usable array of bits for the given byte.55func getBits(in byte) Bits {56	return [8]bool{57		(in>>7)&1 == 1,58		(in>>6)&1 == 1,59		(in>>5)&1 == 1,60		(in>>4)&1 == 1,61		(in>>3)&1 == 1,62		(in>>2)&1 == 1,63		(in>>1)&1 == 1,64		in&1 == 1,65	}66}67// getByte returns the byte represented by these bits.68func (b Bits) getByte() byte {69	var result byte70	for idx, truthy := range b {71		if truthy {72			result |= 1 << (7 - idx)73		}74	}75	return result76}77// EncodeInstrBForm handles encoding a given opcode, BO, BI, BD, AA and LK.78// I-form assumes:79//   - 6 bits for the opcode80//   - 5 bits for BO81//   - 5 bits for BI82//   - 24 bits for BD83//   - 1 bit for absolute (AA)84//   - 1 bit for should store in link register (LK)85func EncodeInstrBForm(opcode byte, BO Register, BI Register, BD [3]byte, AA bool, LK bool) Instruction {86	opBits := getBits(opcode)87	bOBits := getBits(byte(BO))88	bIBits := getBits(byte(BI))89	bDTwo := getBits(BD[1])90	bDThree := getBits(BD[2])91	instr := [4]Bits{92		{93			// We need the upper six bits for our opcode.94			opBits[2], opBits[3], opBits[4], opBits[5], opBits[6], opBits[7],95			// We need the upper five bits for BO and BI.96			bOBits[3], bOBits[4],97		},98		{99			bOBits[5], bOBits[6], bOBits[7], bIBits[3], bIBits[4], bIBits[5], bIBits[6], bIBits[7],100		},101		{102			// We need the upper 14 bits for the destination branch (BD).103			bDTwo[2], bDTwo[3], bDTwo[4], bDTwo[5], bDTwo[6], bDTwo[7], bDThree[0], bDThree[1],104		},105		{106			bDThree[2], bDThree[3], bDThree[4], bDThree[5], bDThree[6], bDThree[7],107			AA,108			LK,109		},110	}111	return Instruction{instr[0].getByte(), instr[1].getByte(), instr[2].getByte(), instr[3].getByte()}112}113// EncodeInstrDForm handles encoding a given opcode, RT, RA and SI.114// D-form assumes:115//  - 6 bits for the opcode116//  - 5 for rT117//  - 5 for rA118//  - 16 for SI119func EncodeInstrDForm(opcode byte, rT Register, rA Register, value uint16) Instruction {120	var instr [2]Bits121	opBits := getBits(opcode)122	rTBits := getBits(byte(rT))123	rABits := getBits(byte(rA))124	instr[0] = Bits{125		// We need the upper six bits for our opcode.126		opBits[2],127		opBits[3],128		opBits[4],129		opBits[5],130		opBits[6],131		opBits[7],132		// Next, the lower two bits for rT.133		rTBits[3],134		rTBits[4],135	}136	instr[1] = Bits{137		// Third, the lower three bits for rT.138		rTBits[5],139		rTBits[6],140		rTBits[7],141		// Finally, all five lowest bits for rA.142		rABits[3],143		rABits[4],144		rABits[5],145		rABits[6],146		rABits[7],147	}148	firstInstr := instr[0].getByte()149	secondInstr := instr[1].getByte()150	valByte := twoByte(value)151	return Instruction{firstInstr, secondInstr, valByte[0], valByte[1]}152}153// EncodeInstrIForm handles encoding a given opcode, LI, AA and LK.154// I-form assumes:155//   - 6 bits for the opcode156//   - 24 bits for LI157//   - 1 bit for absolute (AA)158//   - 1 bit for should store in link register (LK)159func EncodeInstrIForm(opcode byte, LI [3]byte, AA bool, LK bool) Instruction {160	opBits := getBits(opcode)161	liOne := getBits(LI[0])162	liTwo := getBits(LI[1])163	liThree := getBits(LI[2])164	instr := [4]Bits{165		{166			// We need the upper six bits for our opcode.167			opBits[2], opBits[3], opBits[4], opBits[5], opBits[6], opBits[7],168			// Otherwise, copy LI as-is.169			liOne[0], liOne[1],170		},171		{172			liOne[2], liOne[3], liOne[4], liOne[5], liOne[6], liOne[7], liTwo[0], liTwo[1],173		},174		{175			liTwo[2], liTwo[3], liTwo[4], liTwo[5], liTwo[6], liTwo[7], liThree[0], liThree[1],176		},177		{178			liThree[2], liThree[3], liThree[4], liThree[5], liThree[6], liThree[7],179			// Copy AA and LK as-is.180			AA,181			LK,182		},183	}184	return Instruction{instr[0].getByte(), instr[1].getByte(), instr[2].getByte(), instr[3].getByte()}185}186// EncodeInstrXForm handles encoding a given opcode, rS, rA, rB, an extended opcode and rC.187// X-form assumes:188//   - 6 bits for the opcode189//   - 5 bits for rS190//   - 5 bits for rA191//   - 5 bits for rB192//   - 10 bits for XO (extended opcode)193//   - 1 bit for rC (dependent on the condition register)194func EncodeInstrXForm(opcode byte, rS Register, rA Register, rB Register, XO uint16, rC bool) Instruction {195	opBits := getBits(opcode)196	rSBits := getBits(byte(rS))197	rABits := getBits(byte(rA))198	rBBits := getBits(byte(rB))199	extendedOP1 := getBits(twoByte(XO)[0])200	extendedOP2 := getBits(twoByte(XO)[1])201	instr := [4]Bits{202		{203			// We need the upper six bits for our opcode.204			opBits[2], opBits[3], opBits[4], opBits[5], opBits[6], opBits[7],205			// We need the upper five bits for rS, rA and rB.206			rSBits[3], rSBits[4],207		},208		{209			rSBits[5], rSBits[6], rSBits[7], rABits[3], rABits[4], rABits[5], rABits[6], rABits[7],210		},211		{212			// We need the upper 10 bits for the extended opcode.213			rBBits[3], rBBits[4], rBBits[5], rBBits[6], rBBits[7], extendedOP1[6], extendedOP1[7], extendedOP2[0],214		},215		{216			extendedOP2[1], extendedOP2[2], extendedOP2[3], extendedOP2[4], extendedOP2[5], extendedOP2[6], extendedOP2[7], rC,217		},218	}219	return Instruction{instr[0].getByte(), instr[1].getByte(), instr[2].getByte(), instr[3].getByte()}220}221// EncodeInstrXFXForm handles encoding a given opcode, rS, spr, an extended opcode and rC.222// XFX-form assumes:223//   - 6 bits for the opcode224//   - 5 bits for rS225//   - 10 bits for spr (special-purpose register)226//   - 10 bits for XO (extended opcode)227//   - 1 bit for rC (dependent on the condition register)228func EncodeInstrXFXForm(opcode byte, rS Register, spr SpecialRegister, XO uint16, rC bool) Instruction {229	opBits := getBits(opcode)230	rSBits := getBits(byte(rS))231	sprBytes := twoByte(uint16(spr))232	sprBitsOne := getBits(sprBytes[0])233	sprBitsTwo := getBits(sprBytes[1])234	extendedOP1 := getBits(twoByte(XO)[0])235	extendedOP2 := getBits(twoByte(XO)[1])236	instr := [4]Bits{237		{238			// We need the upper six bits for our opcode.239			opBits[2], opBits[3], opBits[4], opBits[5], opBits[6], opBits[7],240			// We need the upper five bits for rS.241			rSBits[3], rSBits[4],242		},...

powerpc.go

Source:powerpc.go

...43func CRXOR() Instruction {44	return [4]byte{0x4c, 0xc6, 0x31, 0x82}45}46// ADDI represents the addi PowerPC instruction.47func ADDI(rT Register, rA Register, value uint16) Instruction {48	return EncodeInstrDForm(14, rT, rA, value)49}50// LI represents the li mnemonic on PowerPC.51func LI(rT Register, value uint16) Instruction {52	return ADDI(rT, 0, value)53}54// SUBI represents the subi mnemonic on PowerPC.55// TODO: handle negative values properly?56func SUBI(rT Register, rA Register, value uint16) Instruction {57	return ADDI(rT, 0, -value)58}59// ADDIS represents the addis PowerPC instruction.60func ADDIS(rT Register, rA Register, value uint16) Instruction {61	return EncodeInstrDForm(15, rT, rA, value)62}63// LIS represents the lis mnemonic on PowerPC.64func LIS(rT Register, value uint16) Instruction {65	return ADDIS(rT, 0, value)66}67// OR represents the or PowerPC instruction.68func OR(rS Register, rA Register, rB Register, rC bool) Instruction {69	return EncodeInstrXForm(31, rS, rA, rB, 444, rC)70}71// ORI represents the ori PowerPC instruction.72func ORI(rS Register, rA Register, value uint16) Instruction {73	return EncodeInstrDForm(24, rS, rA, value)74}75// STH represents the sth PowerPC instruction.76func STH(rS Register, offset uint16, rA Register) Instruction {77	return EncodeInstrDForm(44, rS, rA, offset)78}79// EIEIO represents the eieio PowerPC instruction.80func EIEIO() Instruction {81	return EncodeInstrXForm(31, 0, 0, 0, 854, false)82}83// STW represents the stw PowerPC instruction.84func STW(rS Register, offset uint16, rA Register) Instruction {85	return EncodeInstrDForm(36, rS, rA, offset)86}87// STB represents the stb PowerPC instruction.88func STB(rS Register, offset uint16, rA Register) Instruction {89	return EncodeInstrDForm(38, rS, rA, offset)90}91// LWZ represents the lwz PowerPC instruction.92func LWZ(rT Register, offset uint16, rA Register) Instruction {93	return EncodeInstrDForm(32, rT, rA, offset)94}95// NOP represents the nop mnemonic for PowerPC.96func NOP() Instruction {97	return ORI(R0, R0, 0)98}99// CMPWI represents the cmpwi mnemonic for PowerPC.100// It does not support any other CR fields asides from 0.101func CMPWI(rA Register, value uint16) Instruction {102	return EncodeInstrDForm(11, 0, rA, value)103}104// SYNC represents the sync PowerPC instruction.105func SYNC() Instruction {106	return EncodeInstrXForm(31, 0, 0, 0, 598, false)107}108// MTSPR represents the mtspr PowerPC instruction.109func MTSPR(spr SpecialRegister, rS Register) Instruction {110	return EncodeInstrXFXForm(31, rS, spr, 467, false)111}112// MFSPR represents the mfspr PowerPC instruction.113func MFSPR(rS Register, spr SpecialRegister) Instruction {114	return EncodeInstrXFXForm(31, rS, spr, 339, false)115}116// STWU represents the stwu PowerPC instruction.117func STWU(rS Register, rA Register, offset uint16) Instruction {118	return EncodeInstrDForm(37, rS, rA, offset)119}120// calcDestination determines the proper offset from a given121// calling address and target address.122func calcDestination(from uint, target uint) [3]byte {123	offset := target - from124	if offset > 0x00FFFFFF {125		offset = 0x10001 - (uint(int(from) - int(target)))126	}127	// Sign-extend by two bytes128	calc := uint32(offset >> 2)129	return uint24(calc)130}131// BL represents the bl PowerPC instruction....

Using AI Code Generation

1import "fmt"2func main() {3    p.Register()4}5import "fmt"6func main() {7    i.Register()8}9import "fmt"10func main() {11    a.Register()12}13import "fmt"14func main() {15    m.Register()16}17import "fmt"18func main() {19    m.Register()20}21import "fmt"22func main() {23    m.Register()24}25import "fmt"26func main() {27    m.Register()28}29import "fmt"30func main() {31    m.Register()32}33import "fmt"34func main() {35    m.Register()36}37import "fmt"38func main() {39    m.Register()40}41import "fmt"42func main() {43    m.Register()44}45import "fmt"46func main() {47    m.Register()48}49import "fmt"50func main() {51    m.Register()52}

Using AI Code Generation

1import "fmt"2type Powerpc struct {3}4func (p Powerpc) Register() {5    fmt.Println("Powerpc register")6}7func main() {8    p.Register()9}

Using AI Code Generation

1import (2func main() {3	fmt.Println("Hello, playground")4	powerpc.Register()5}6import (7func Register() {8	fmt.Println("Registering PowerPC")9}

Using AI Code Generation

1import "fmt"2func main() {3    fmt.Println("Hello, world.")4    p.Register()5}6import "fmt"7func main() {8    fmt.Println("Hello, world.")9    p.Register()10}11import "fmt"12func main() {13    fmt.Println("Hello, world.")14    p.Register()15}16import "fmt"17func main() {18    fmt.Println("Hello, world.")19    p.Register()20}21import "fmt"22func main() {23    fmt.Println("Hello, world.")24    p.Register()25}26import "fmt"27func main() {28    fmt.Println("Hello, world.")29    p.Register()30}31import "fmt"32func main() {33    fmt.Println("Hello, world.")34    p.Register()35}36import "fmt"37func main() {38    fmt.Println("Hello, world.")39    p.Register()40}41import "fmt"42func main() {43    fmt.Println("Hello, world.")44    p.Register()45}46import "fmt"47func main() {48    fmt.Println("Hello, world.")49    p.Register()50}51import "fmt"52func main() {53    fmt.Println("Hello, world

Using AI Code Generation

1import (2func main() {3	fmt.Printf("Register = 0x%x4}5	0x0000 00000 (2.go:9)	TEXT	"".main(SB), $16-06	0x0000 00000 (2.go:9)	FUNCDATA	$0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB)7	0x0000 00000 (2.go:9)	FUNCDATA	$1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB)8	0x0000 00000 (2.go:10)	MOVQ	(TLS), CX9	0x0009 00009 (2.go:10)	CMPQ	SP, 16(CX)10	0x000d 00013 (2.go:10)	PCDATA	$0, $011	0x000d 00013 (2.go:10)	JLS	8312	0x000f 00015 (2.go:10)	PCDATA	$0, $-213	0x000f 00015 (2.go:10)	SUBQ	$16, SP14	0x0013 00019 (2.go:10)	MOVQ	BP, 8(SP)15	0x0018 00024 (2.go:10)	LEAQ	8(SP), BP16	0x001d 00029 (2.go:10)	FUNCDATA	$0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB)17	0x001d 00029 (2

Using AI Code Generation

1import (2func main() {3	p.Register(0x12345678)4	fmt.Printf("0x12345678 -> 0x%x5", p.GetRegister())6}7import (8func main() {9	p.Register(0x12345678)10	fmt.Printf("0x12345678 -> 0x%x11", p.GetRegister())12}13import (14func main() {15	p.Register(0x12345678)16	fmt.Printf("0x12345678 -> 0x%x17", p.GetRegister())18}19import (20func main() {21	p.Register(0x12345678)22	fmt.Printf("0x12345678 -> 0x%x23", p.GetRegister())24}25import (26func main() {27	p.Register(0x12345678)28	fmt.Printf("0x12345678 -> 0x%x29", p.GetRegister())30}31import (32func main() {33	p.Register(0x12345678)34	fmt.Printf("0x12345678 -> 0x%x35", p.GetRegister())36}37import (38func main() {39	p.Register(0x123

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