How to use imm64 method of x86 Package

Best Syzkaller code snippet using x86.imm64

spec.go

Source:spec.go Github

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...71//72// Perhaps most significantly, the argument syntaxes used in the mnemonic indicate73// exactly how to derive the argument from the instruction encoding, or vice versa.74//75// Immediate values: imm8, imm8u, imm16, imm16u, imm32, imm64.76// Immediates are signed by default; the u suffixes indicates an unsigned value.77//78// Memory operands. The forms m, m128, m14/28byte, m16, m16&16, m16&32, m16&64, m16:16, m16:32,79// m16:64, m16int, m256, m2byte, m32, m32&32, m32fp, m32int, m512byte, m64, m64fp, m64int,80// m8, m80bcd, m80dec, m80fp, m94/108byte. These operands always correspond to the81// memory address specified by the r/m half of the modrm encoding.82//83// Integer registers.84// The forms r8, r16, r32, r64 indicate a register selected by the modrm reg encoding.85// The forms rmr16, rmr32, rmr64 indicate a register (never memory) selected by the modrm r/m encoding.86// The forms r/m8, r/m16, r/m32, and r/m64 indicate a register or memory selected by the modrm r/m encoding.87// Forms with two sizes, like r32/m16 also indicate a register or memory selected by the modrm r/m encodng,88// but the size for a register argument differs from the size of a memory argument.89// The forms r8V, r16V, r32V, r64V indicate a register selected by the VEX.vvvv bits....

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amd64.go

Source:amd64.go Github

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...243 a.insn("xor", a.reg4(dest), a.reg4(dest))244 case int64(value) >= -0x80000000 && int64(value) <= 0x7fffffff:245 a.insn("mov", a.reg4(dest), a.imm(int(value)))246 default:247 a.insn("mov", a.reg(dest), a.imm64(value))248 }249 a.Set(dest)250}251func (a *amd64) MoveReg(dest, src Reg) {252 a.check(src)253 if a.reg(dest) != a.reg(src) {254 a.insn("mov", a.reg(dest), a.reg(src))255 }256 a.Set(dest)257}258func (a *amd64) MoveRegFloat(dest Reg, src FloatReg) {259 a.insn("movq", a.reg(dest), a.floatreg(src))260 a.Set(dest)261}262func (a *amd64) AddImm(dest, src Reg, value int) {263 a.check(src)264 switch {265 case value == 0:266 a.MoveReg(dest, src)267 case a.reg(dest) == a.reg(src):268 a.insn("add", a.reg(dest), a.imm(value))269 case value > 0:270 a.insnf("lea %s, [%s + %s]", a.reg(dest), a.reg(src), a.imm(value))271 default:272 a.insn("mov", a.reg(dest), a.reg(src))273 a.insn("add", a.reg(dest), a.imm(value))274 }275 a.Set(dest)276}277func (a *amd64) AddReg(dest, src1, src2 Reg) {278 a.check(src1)279 a.check(src2)280 switch {281 case a.reg(dest) == a.reg(src1):282 a.insn("add", a.reg(dest), a.reg(src2))283 case a.reg(dest) == a.reg(src2):284 a.insn("add", a.reg(dest), a.reg(src1))285 default:286 a.insnf("lea %s, [%s + %s]", a.reg(dest), a.reg(src1), a.reg(src2))287 }288 a.Set(dest)289}290func (a *amd64) SubtractImm(dest Reg, value int) {291 a.check(dest)292 if value != 0 {293 a.insn("sub", a.reg(dest), a.imm(value))294 }295 a.Set(dest)296}297func (a *amd64) SubtractReg(dest, src Reg) {298 a.check(dest)299 a.check(src)300 a.insn("sub", a.reg(dest), a.reg(src))301 a.Set(dest)302}303func (a *amd64) MultiplyImm(dest, src Reg, value int, temp Reg) {304 a.check(src)305 a.insn("imul", a.reg(dest), a.reg(src), a.imm(value))306 a.Set(dest)307 a.Set(temp.As(""))308}309func (a *amd64) AndImm(dest Reg, value int) {310 a.check(dest)311 switch {312 case value == 0:313 a.insn("xor", a.reg4(dest), a.reg4(dest))314 case value > 0 && value <= 0x7fffffff:315 a.insn("and", a.reg4(dest), a.imm(value))316 default:317 a.insn("and", a.reg(dest), a.imm(value))318 }319 a.Set(dest)320}321func (a *amd64) AndReg(dest, src Reg) {322 a.check(dest)323 a.check(src)324 a.insn("and", a.reg(dest), a.reg(src))325 a.Set(dest)326}327func (a *amd64) OrImm(dest Reg, value int) {328 a.check(dest)329 a.insn("or", a.reg(dest), a.imm(value))330 a.Set(dest)331}332func (a *amd64) OrReg(dest, src Reg) {333 a.check(dest)334 a.check(src)335 a.insn("or", a.reg(dest), a.reg(src))336 a.Set(dest)337}338func (a *amd64) ShiftImm(s Shift, r Reg, count int) {339 a.check(r)340 if count != 0 {341 a.insn(a.shift(s), a.reg(r), a.imm(count))342 }343 a.Set(r)344}345func (a *amd64) Load(dest, base Reg, offset int) {346 a.check(base)347 switch {348 case offset == 0:349 a.insnf("mov %s, [%s]", a.reg(dest), a.reg(base))350 case offset > 0:351 a.insnf("mov %s, [%s + %d]", a.reg(dest), a.reg(base), offset)352 default:353 a.insnf("mov %s, [%s - %d]", a.reg(dest), a.reg(base), -offset)354 }355 a.Set(dest)356}357func (a *amd64) Load4Bytes(dest, base Reg, offset int) {358 a.check(base)359 switch {360 case offset == 0:361 a.insnf("mov %s, [%s]", a.reg4(dest), a.reg(base))362 case offset > 0:363 a.insnf("mov %s, [%s + %d]", a.reg4(dest), a.reg(base), offset)364 default:365 a.insnf("mov %s, [%s - %d]", a.reg4(dest), a.reg(base), -offset)366 }367 a.Set(dest)368}369func (a *amd64) LoadByte(dest, base Reg, offset int) {370 a.check(base)371 switch {372 case offset == 0:373 a.insnf("mov %s, [%s]", a.reg1(dest), a.reg(base))374 case offset > 0:375 a.insnf("mov %s, [%s + %d]", a.reg1(dest), a.reg(base), offset)376 default:377 a.insnf("mov %s, [%s - %d]", a.reg1(dest), a.reg(base), -offset)378 }379 a.Set(dest)380}381func (a *amd64) Store(base Reg, offset int, src Reg) {382 a.check(base)383 a.check(src)384 switch {385 case offset == 0:386 a.insnf("mov [%s], %s", a.reg(base), a.reg(src))387 case offset > 0:388 a.insnf("mov [%s + %d], %s", a.reg(base), offset, a.reg(src))389 default:390 a.insnf("mov [%s - %d], %s", a.reg(base), -offset, a.reg(src))391 }392}393func (a *amd64) Store4Bytes(base Reg, offset int, src Reg) {394 a.check(base)395 a.check(src)396 switch {397 case offset == 0:398 a.insnf("mov [%s], %s", a.reg(base), a.reg4(src))399 case offset > 0:400 a.insnf("mov [%s + %d], %s", a.reg(base), offset, a.reg4(src))401 default:402 a.insnf("mov [%s - %d], %s", a.reg(base), -offset, a.reg4(src))403 }404}405func (a *amd64) Push(r Reg) {406 a.check(r)407 a.insn("push", a.reg(r))408}409func (a *amd64) Pop(r Reg) {410 a.insn("pop", a.reg(r))411 a.Set(r)412}413func (a *amd64) Jump(name string) {414 a.insn("jmp", symbol(name))415}416func (a *amd64) JumpRegRoutine(r Reg, internalNamePrefix string) {417 a.check(r)418 a.Call(internalNamePrefix + "_setup")419 a.label(internalNamePrefix + "_capture")420 a.insn("pause")421 a.Jump(internalNamePrefix + "_capture")422 a.FunctionWithoutPrologue(internalNamePrefix + "_setup")423 a.Store(a.StackPtr, 0, r)424 a.MoveImm(r, 0)425 a.Return()426}427func (a *amd64) JumpIfBitSet(r Reg, bit uint, name string) {428 a.check(r)429 switch {430 case bit < 31:431 a.insn("test", a.reg4(r), a.imm(1<<bit))432 default:433 a.insn("test", a.reg(r), a.imm(1<<bit))434 }435 a.insn("jne", symbol(name))436}437func (a *amd64) JumpIfBitNotSet(r Reg, bit uint, name string) {438 a.check(r)439 switch {440 case bit < 31:441 a.insn("test", a.reg4(r), a.imm(1<<bit))442 default:443 a.insn("test", a.reg(r), a.imm(1<<bit))444 }445 a.insn("je", symbol(name))446}447func (a *amd64) JumpIfImm(c Cond, r Reg, value int, name string) {448 a.check(r)449 switch {450 case value == 0 && (c == EQ || c == NE):451 a.insn("test", a.reg(r), a.reg(r))452 default:453 a.insn("cmp", a.reg(r), a.imm(value))454 }455 a.insn("j"+a.cond(c), symbol(name))456}457func (a *amd64) JumpIfReg(c Cond, dest, src Reg, name string) {458 a.check(dest)459 a.check(src)460 a.insn("cmp", a.reg(dest), a.reg(src))461 a.insn("j"+a.cond(c), symbol(name))462}463func (a *amd64) Call(name string) {464 a.insn("call", symbol(name))465}466func (a *amd64) Syscall(nr Syscall) {467 a.MoveImm(a.SyscallNr, nr.AMD64)468 a.insn("syscall")469 a.Set(a.SysResult)470}471func (a *amd64) Unreachable() {472 a.insn("int3")473}474func (a *amd64) speculationBarrier() {475 a.insn("int3")476}477func (a *amd64) imm(x int) string {478 return fmt.Sprintf("%d", x)479}480func (a *amd64) imm64(x uint64) string {481 return fmt.Sprintf("%d", x)482}483func (a *amd64) reg(x Reg) string {484 return x.AMD64.reg()485}486func (a *amd64) reg4(x Reg) string {487 return x.AMD64.reg4()488}489func (a *amd64) reg1(x Reg) string {490 return x.AMD64.reg1()491}492func (a *amd64) floatreg(x FloatReg) string {493 return fmt.Sprintf("xmm%d", x)494}...

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